Flat-panel displays are widely used to visually display information where the physical thickness and bulk of a conventional cathode ray tube is unacceptable or impractical. Portable electronic devices and systems have benefited from the use of flat-panel displays, which require less space and result in a lighter, more compact display system than provided by conventional cathode ray tube technology.
The invention described below is concerned primarily with field emission flat-panel displays or FEDs. In a field emission flat-panel display, an electron emitting cathode plate is separated from a display face or face plate at a relatively small, uniform distance. The intervening space between these elements is evacuated. Field emission displays have the outward appearance of a CRT except that they are very thin. While being simple, they are also capable of very high resolutions. In some cases they can be assembled by use of technology already used in integrated circuit production.
Field emission flat-panel displays utilize field emission devices, in groups or individually, to emit electrons that energize a cathodoluminescent material deposited on a surface of a viewing screen or display face plate. The emitted electrons originate from an emitter or cathode electrode at a region of geometric discontinuity having a sharp edge or tip. Electron emission is induced by application of potentials of appropriate polarization and magnitude to the various electrodes of the field emission device display, which are typically arranged in a two-dimensional matrix array.
Field emission display devices differ operationally from cathode ray tube displays in that information is not impressed onto the viewing screen by means of a scanned electron beam, but rather by selectively controlling the electron emission from individual emitters or select groups of emitters in an array. This is commonly known as “pixel addressing.” Various displays are described in U.S. Pat. Nos. 5,655,940, 5,661,531, 5,754,149, 5,563,470, and 5,598,057 the disclosures of which are incorporated by reference herein.
FIG. 1 illustrates a cross-sectional view of an exemplary field emission display (FED) device 10. Device 10 comprises a face plate 12, a base plate 14, and spacers 16 extending between base plate 14 and face plate 12 to maintain face plate 12 in spaced relation relative to base plate 14. Face plate 12, base plate 14 and spacers 16 can comprise, for example, glass. Phosphor regions 18, 20, and 22 are associated with face plate 12, and separated from face plate 12 by a transparent conductive layer 24. Transparent conductive layer 24 can comprise, for example, indium tin oxide or tin oxide. Phosphor regions 18, 20, and 22 comprise phosphor-containing masses. Each of phosphor regions 18, 20, and 22 can comprise a different color phosphor. Typically, the phosphor regions comprise either red, green or blue phosphor. A black matrix material 26 is provided to separate phosphor regions 18, 20, and 22 from one another.
Base plate 14 has emitter regions 28, 30 and 32 associated therewith. The emitter regions comprise emitters or field emitter tips 34 which are located within radially symmetrical apertures 36 (only some of which are labeled) formed through a conductive gate layer 38 and a lower insulating layer 40. Emitters 34 are typically about 1 micron high, and are separated from base plate 14 by a conductive layer 42. Emitters 34 and apertures 36 are connected with circuitry (not shown) enabling column and row addressing of the emitters 34 and apertures 36, respectively.
A voltage source 44 is provided to apply a voltage differential between emitters 34 and surrounding gate apertures 36. Application of such voltage differential causes electron streams 46, 48, and 50 to be emitted toward phosphor regions 18, 20, and 22 respectively. Conductive layer 24 is charged to a potential higher than that applied to gate layer 38, and thus functions as an anode toward which the emitted electrons accelerate. Once the emitted electrons contact phosphor dots associated with regions 18, 20, and 22 light is emitted. As discussed above, the emitters 34 are typically matrix addressable via circuitry. Emitters 34 can thus be selectively activated to display a desired image on the phosphor-coated screen of face plate 12.
The face plate typically has red, green and blue phosphor regions with black matrix areas 26 surrounding the phosphor regions. The three phosphor colors (red, green, and blue) can be utilized to generate a wide array of screen colors by simultaneously stimulating one or more of the red, green and blue regions.
As displays such as the one described above continue to grow in size and complexity, challenges are posed with respect to their design. For example, small-sized FED devices typically have a high resolution. As such displays grow in size, such resolution is desired to be maintained or even improved, yet challenges exist because of the increased dimensions. One such challenge is manifest in the video rate requirement in larger-area displays. The video rate requirement is typically determined by the RC time constant of the device. Typically, address lines (e.g., row and column address lines) extend the entire length or width dimension respectively, of the addressable matrix of field emitters. Larger displays call for larger matrices. With larger matrices, such address lines can extend for greater lengths. Such greater lengths, accordingly, carry with them higher RC time constants which adversely impact the video rate requirement. Other challenges in the design of the larger-area display will be apparent to those of skill in the art.
One solution which has been proposed in the past (see, e.g. U.S. Pat. No. 5,655,940) is to provide separate emitter plates which are subsequently mounted on a substrate to provide a larger-area display. This approach, however, can be inadequate and can result in much more processing complexity than is desirable. Specifically, multiple emitter plates must be separately formed and positioned relative to one another on a substrate. The plates must be precisely positioned to avoid anomalies in the subsequently rendered image. Needless to say, this can be a time-consuming process and results in more processing complexity than is desirable.
Accordingly, this invention. arose out of concerns associated with providing improved field emission display (FED) devices and methods of forming such devices. This invention also arose out of concerns associated with providing larger-area FED displays with little or no additional processing complexity.